1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method of the device.
2. Description of the Related Art
As conductor devices to be mounted on small-sized electronic devices represented by portable electronic devices and the like, there are known chip size packages (CSPs) each having dimensions substantially equal to that of a semiconductor substrate. Among the CSPs, a CSP in which packaging is completed in a wafer state and which is separated into individual semiconductor devices by dicing is also referred to as a wafer level package (WLP). In Jpn. Pat. Appln. KOKAI Publication No. 2004-349461, a typical structure of the WLP is disclosed. In the semiconductor device described in this prior literature, wiring lines are extended from connection pads on the upper surface of an insulating film which covers the connection pads formed on the semiconductor substrate except their central parts, columnar electrodes are arranged on the upper surfaces of connection pad portions formed on ends of the extended wiring lines, and a sealing film is formed so as to cover the wiring lines between the columnar electrodes on the upper surface of the insulating film. The sealing film is formed so that the upper surface of the sealing film and the upper surfaces of the columnar electrodes are on one plane. Solder balls are provided on the upper surfaces of the columnar electrodes.
Among such semiconductor devices as described above, there is a device in which interlayer insulating film wiring line laminated structure portions each including a laminated structure of interlayer insulating films and the wiring lines are provided between the semiconductor substrate and the insulating film. In this device, when an interval between the wiring lines of the interlayer insulating film wiring line laminated structure portion decreases with miniaturization of the semiconductor devices, a capacity between the wiring lines increases, with the result that a delay of a signal which transmits through the wiring lines increases.
To improve this point, as a material of the interlayer insulating film, much attention is paid to a low dielectric film such as a low-k material having a dielectric constant lower than a dielectric constant of 4.2 to 4.0 of silicon oxide which is generally used as the material of the interlayer insulating film. Examples of the low-k material include SiOC obtained by doping silicon oxide (SiO2) with carbon (C), and SiOCH further containing H. To further lower the dielectric constant, air-containing porous type low dielectric films are also being investigated.
However, in the above semiconductor device including the low dielectric film, especially the low dielectric film represented by the porous type low dielectric film having a hollow structure has a small mechanical strength and is easily influenced by moisture. As a result, there is a problem that the low dielectric film easily peels from an underlayer.